MC74VHCT125ADR2G, счетверенный шинный буфер с третьим состоянием 14-soicn
Описание
Описание MC74VHCT125ADR2G
The MC74VHCT125ADR2G is a quad Bus Buffer with 3-state control inputs. It is a high speed CMOS quad bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent bipolar Schottky TTL while maintaining CMOS low power dissipation. It requires the 3-state control input (OE) to be set High to place the output into the high impedance state. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 to 5V, because it has full 5V CMOS level output swings. The output structures also provide protection when VCC = 0V. These input and output structures help prevent device destruction caused by supply voltage - input/output voltage mismatch, battery backup, hot insertion. The internal circuit is composed of 3-stage, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.
• Power down protection provided on inputs
• Balanced propagation delays
• Pin and function compatible with other standard logic families
• Designed for 2 to 5.5V operating range
• High speed - Propagation delay (tpd) = 3.8ns typical at VCC = 5V
• Low power dissipation - ICC = 4µA maximum at TA = 25°C
• Latch-up performance exceeds 300mA
• Chip complexity - 72 FETs or 18 equivalent gates
| Минимальная Рабочая Температура | -55 C |
| Максимальная Рабочая Температура | 125 C |
| Максимальное Напряжение Питания | 5.5В |
| Минимальное Напряжение Питания | 4.5В |
| Количество Выводов | 14вывод(-ов) |
| Тип Логического Устройства | Буфер, Неинвертирующий |
| Стиль Корпуса Микросхемы Логики | SOIC |
| Базовый Номер / Семейство Логики | 74VHC125 |
| Базовый Номер Микросхемы Логики | 74125 |
| Семейство Логической Микросхемы | 74VHC |
| Вес, г | 0.25 |